Browsing by Author "Zeng, Yuping"
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Item Fabrication of Germanium Tin Microstructures Through Inductively Coupled Plasma Dry Etching(IEEE Transactions on Nanotechnology, 2021-09-30) Lin, Guangyang; Cui, Peng; Wang, Tao; Hickey, Ryan; Zhang, Jie; Zhao, Haochen; Kolodzey, James; Zeng, YupingGermanium tin (GeSn) with a Sn content of >12% has a great potential for optoelectronic devices due to its direct bandgap property. In this work, the anisotropic etching of GeSn with Sn content of 12.5% and selective etching of Ge over GeSn were explored by inductively couple plasma (ICP) dry etching to obtain various microstructures. Through adding oxygen into chlorine and argon and adjusting the process pressure, the anisotropic etching of GeSn was optimized with an ideal sidewall angle of 89 o . The optimized process is compatible with both positive and negative resists. By altering the ICP power, Ge etching recipes with low and high etching rates were developed, which are favorable for fabricating GeSn nano- and micro-structures, respectively. An etching selectivity of >126 for Ge over GeSn with Sn content of >10% can be achieved. With the optimized dry etching recipes, suspended GeSn microribbons and microdisks were realized. Ultimately, the suspended GeSn microstructures were transferred onto 40-nm-thick ZrO 2 on p + -Si to form a GeSn-on-insulator (GeSnOI) substrate. For a fabricated 45-nm-thick Ge 0.875 Sn 0.125 OI back-gated transistor, the subthreshold swing (SS) of 240 mV/dec is reasonably low for a non-optimized device, suggesting that the explored dry etching methods are promising for device processing.Item Gallium-incorporated TiO2 thin films by atomic layer deposition for future electronic devices(Frontiers in Materials, 2024-06-13) Sun, Qingxuan; Lin, Yingzhen; Han, Chaoya; Yang, Ze; Li, Ying; Zeng, Yuping; Yang, Weifeng; Zhang, JieTitanium dioxide (TiO2) with advantages including abundance in earth, non-toxicity, high chemical stability, surface hydrophobicity in dark, and extremely high permittivity could be highly promising for advanced electronics. However, the thermal stability and low bandgap (Eg) of TiO2 pose a big challenge for TiO2 to be used as dielectric, which could be resolved by doping with other metal cations. In this work, we studied the impact of gallium incorporation on electrical and material characteristics of TiO2 thin films. These TiO2 and TiXGaO films with thickness of 15 nm were derived by atomic layer deposition (ALD) and then annealed in O2 ambient at 500°C, where the levels of Ga incorporation were tuned by the cycle ratio (X) of TiO2 to that of Ga2O3 during ALD growth. Both thin film transistors (TFTs) using TiXGaO (TiO2) thin films as the channel and metal-oxide semiconductor capacitors (MOSCAPs) using TiXGaO (TiO2) thin films as the dielectric were fabricated to unravel the impact of Ga incorporation on electrical properties of TiO2 thin films. It is found that the Ga incorporation reduces the conductivity of TiO2 thin films significantly. Pure TiO2 thin films could be the ideal channel material for TFTs with excellent switching behaviors whereas Ga-incorporated TiO2 thin films could be the dielectric material for MOSCAPs with good insulating properties. The leakage current and dielectric constant (k) value are also found to be decreased with the increased Ga content in TiXGaO/Si MOSCAPs. Additionally, the density of interface trap (Dit) between TiXGaO and Si were extracted by multi-frequency conductance method, where a “U-shape” trap profile with similar level of Dit values can be observed for TiXGaO MOSCAPs with varying Ga contents. Material characterizations show that the Ga incorporation destabilizes the crystallization and enlarges the bandgap (Eg) of TiO2 while maintaining a smooth surface. Interestingly, Ga incorporation is found to decrease the overall oxygen content and introduce more oxygen-related defects in the film. As a result, the reduction of leakage current upon Ga incorporation in MOSCAPs could be explained by amorphization of the film and enlarged band offset to Si rather than oxygen defect passivation. These Ga-incorporated TiO2 films may found promising usage in future electronic device applications such as trench capacitors in dynamic random-access memory, where the emerging high-k dielectrics with low leakage currents and high thermal stability are demanded.Item High-performance HZO/InAlN/GaN MISHEMTs for Ka-band application(Semiconductor Science and Technology, 2023-02-01) Cui, Peng; Moser, Neil; Chen, Hang; Xiao, John Q.; Chabak, Kelson D.; Zeng, YupingThis paper reports on the demonstration of microwave power performance at 30 GHz on InAlN/GaN metal–insulator–semiconductor high electron mobility transistor (MISHEMT) on silicon substrate by using the Hf0.5Zr0.5O2 (HZO) as a gate dielectric. Compared with Schottky gate HEMT, the MISHEMT with a gate length (LG) of 50 nm presents a significantly enhanced performance with an ON/OFF current ratio (ION/IOFF) of 9.3 × 107, a subthreshold swing of 130 mV dec−1, a low drain-induced barrier lowing of 45 mV V−1, and a breakdown voltage of 35 V. RF characterizations reveal a current gain cutoff frequency (fT) of 155 GHz and a maximum oscillation frequency (fmax) of 250 GHz, resulting in high (fT × fmax)1/2 of 197 GHz and the record high Johnson's figure-of-merit (JFOM = fT × BV) of 5.4 THz V among the reported GaN MISHEMTs on Si. The power performance at 30 GHz exhibits a maximum output power of 1.36 W mm−1, a maximum power gain of 12.3 dB, and a peak power-added efficiency of 21%, demonstrating the great potential of HZO/InAlN/GaN MISHEMTs for the Ka-band application.Item Multilayer MoS2 Back-Gate Transistors with ZrO2 Dielectric Layer Optimization for Low-Power Electronics(physica status solidi (a), 2022-02-18) Zhao, Haochen; Lin, Guangyang; Cui, Peng; Zhang, Jie; Zeng, YupingHerein, high-performance back-gate molybdenum disulfide (MoS2) field-effect transistors (FETs) with high-quality sub-20 nm high-k dielectric layers are developed for high-performance and lower-power consumption applications. The 20 nm ultrathin ZrO2 dielectric layers are deposited by thermal atomic layer deposition (ALD) method, where the growth temperature is varied and it shows a significant impact on the electrical characteristics of the deposited ZrO2 materials. A polydimethylsiloxane (PDMS) transfer process is used to transfer multilayer MoS2 flakes onto a 20 nm ZrO2/p–Si substrate with an optimized dielectric growth temperature without any subsequent processing, resulting in back-gate MoS2 FET device architecture. These transistors demonstrate excellent electrical characteristics with on–off current ratio up to 1.8 × 107, subthreshold swing as low as 70 mV decade−1 and field-effect mobility as high as 3.9 cm2 V−1 s−1. Furthermore, an enhancement-mode device operation and a high complementary metal–oxide–semiconductor (CMOS) ION/IOFF ratio of 107 are achieved. The excellent electrical performance is attributed to the low interface state traps and high-quality ZrO2 dielectric layer, indicating the great potential of our multilayer MoS2 FETs technology for low-power applications.Item A Physically-Based Model of Vertical TFET--Part II: Drain Current Model(IEEE Transactions on Electron Devices, 2022-02-08) Cheng, Qi; Khandelwal, Sourabh; Zeng, YupingA physically based model for the tunneling current of vertical tunneling field transistors (TFET) is proposed. In part I, the expression of φ1D(x,) is derived from the multi-branch general solutions of Poisson's equation. The model's results are verified with TCAD simulation for transistors with different materials, device geometries, and biases. In this article, a surface potential model is validated at different device regions which include channel and drain. Based on the above two electric potential models, Kane's tunneling formula is utilized for the calculation of band-to-band tunneling current. The proposed current model is valid for all transistors' operating regions. The quantum effect on the band-structure parameters is taken into account in the modeling of InAs vertical TFET. It is shown that the channel thickness needs to be optimized to achieve the highest drive current.Item A Physics-Based Model of Vertical TFET--Part I: Modeling of Electric Potential(IEEE Transactions on Electron Devices, 2022-05-13) Cheng, Qi; Khandelwal, Sourabh; Zeng, YupingA physics-based model for the electric potential of vertical TFET is presented in this article. The electric potential formula is derived for the first time from the multi-branch general solutions of Poisson's equation for TFET. The effect of electron inversion charge in the channel is taken into account. A novel approach incorporating the effect of hole mobile charge in the source depletion region is proposed. The model's accuracy is significantly improved compared with the previous source's fully depleted approximation. The model is proven to be accurate in all operating regions. The model's results are verified with TCAD simulation for different structural and material parameters.