Rapid prototyping framework for hardware-software co-design with advanced vector architectures
Date
2022
Authors
Journal Title
Journal ISSN
Volume Title
Publisher
University of Delaware
Abstract
The 21st century has seen an unprecedented level of technological development.
As we break away from the days of general-purpose, sequential computing, we have seen
tremendous advancements in software infrastructure while the many nuances of hardware
development have secluded innovation to the select few familiar with its complexities.
Abstracting these low-level implementation details away from developers and allowing
for the expeditious prototyping of novel hardware designs could greatly increase the
scope of innovation inside the hardware architecture field. It becomes necessary to
not only provide the tools necessary for high-level design but to also ensure the
capabilities of such tools are modernized and able to model even the most contemporary
of architectural innovations. ☐ This work describes the StoneCutter infrastructure, along with its encompassing OpenSoC
System Architect suite of tools; a software infrastructure aimed at providing users a
frictionless design experience for rapidly prototyping new instruction set architectures.
StoneCutter offers opinionated simplicity without sacrificing performance;
the advancements detailed in this work include additions to the language frontend and
compiler infrastructure, which give the user access to modern architectural constructs
including fixed-/variable-width vector and matrix registers as well as a set
of highly-optimized, modular implementations of common linear algebra operations in the form
of intrinsic functions. The StoneCutter compiler then translates the design to an adjacency
matrix representation of its control signals which is automatically pipelined based on
its I/O, flow control, and arithmetic operations. Finally, several artifacts allowing
for exploration and profiling are generated including an optimized Chisel HDL
output along with a custom, LLVM-linked compiler capable of executing binary payloads
on the prototyped ISA.
Description
Keywords
Compilers, Hardware pipelining, Prototyping, StoneCutter, Vector architecture